dsp/mcuZONE Products for the week of March 24, 20084DSP Says…
Image Compression Promised by JPEG2000 Hardware CODEC FPGA Accelerator Devices
A unique JPEG2000 hardware compression platform has been launched by 4DSP, an innovative design company based in Europe and the USA. Powered by Xilinx FPGA accelerators, the new system promises better image compression to meet the needs of next generation digital cameras, 4G infrastructure and headsets. In addition, medical, military and other precision imaging applications will benefit from improved compression performance.
JPEG2000 is a wavelet-based digital imaging compression standard superseding the original discrete cosine transform-based JPEG compression method. 4DSP’s JPEG2000 PMC daughter card is based on two ADV212 devices and a low-cost SPARTAN-3AN FPGA.
The JPEG2000 CODEC platform from 4DSP can grab and compress up to 140Mpixels per second from two independent cameras. It can either encode the video frames prior to or after applying an advanced video/imaging algorithm. Real-time pre-processing on raw data can be performed in the Virtex-4 or Virtex-5 FPGA devices. This flexibility can be used to correct effects such as local brightness or barrel distortion to enhance image quality and filter out elements that may reduce the compression effectiveness.
“The JPEG2000 compression rate is much more efficient than traditional JPEG algorithms,” said Pierrick Vulliez, CTO of 4DSP Inc, “This solution accelerates the next generation of image compression for digital cameras, 4G infrastructure and headset systems.”
“JPEG2000 is the preferred compression method to store vital digital data from microscopy and radiography imagery instruments and it is expected to be the premium compression solution for most demanding medical applications,” commented Sebastien Maury, sales and marketing director of 4DSP Europe.
If your next project requires video processing and you don’t want to do a ground-up design for the capture and compression, the 4DSP dual-camera card may be a good alternative. This compact, relatively low-power card is a nice way to take a pair of raw RGB or Y/C (chrominance/luminance) streams, convert them to the more compact JPEG200 format, and do some preliminary filtering before passing them to the formidable FPGA-based video processing board for whatever image correction, edge detection, feature extraction, or other image analysis functions you want to perform.
This daughter card and its companion video processor are another good example of how FPGAs are edging into territory that was the sole territory of programmable DSPs just a couple of years ago. In this case, most of the heavy FPGA action takes place on their large Virtex-based video processor main board while the small Spartan device on the daughter card is there to manage the two fixed-function ADV212 video codecs and provide a bit of glue logic. It’s interesting that 4DSP designers were able to save BOM costs and board space by implementing the video board glue logic and the MicroBlaze soft processor core on a modestly-sized Spartan-3 device instead of using a separate micro and a PLD.
The JPEG2000 daughterboard is still being characterized so its precise power consumption is unknown. Early estimates place it between 2 W and 4 W. Power consumption for the baseboard is typically 17 W, with a maximum 20 W.
If you shell out the $7 k for the associated FPGA processor board, you’ll be able to use their nice library of pre-developed DSP cores, which include fixed- and floating point-FFTs and a polyphase filter bank. But while the manufacturer does not mention it, I suspect that the sub-$1500 daughter board could be easily interfaced to your own PMC-based image processing board or something from some other vendor that costs significantly less than that $7 k.
One intriguing possibility would be to hook it up to one of Stretch’s powerful configurable array processors. As explained in toolsZONE Editor Alex Mendelsohn’s March 2008 review of their H262 DVR development kit, it combines much of the power of an FPGA with the flexibility of a Tensilica RISC engine. For many applications the Stretch processor sees regular service as a standalone codec but in this case putting a dedicated codec upstream would free the processor for more complex tasks. While most of Stretch development efforts seem to be centered around H.264 video applications, I suspect that it would not be too hard to get them, or a third-party vendor, to offer solutions that support the JPEG2000 standard.
The 4DSP JPEG2000 daughter card is sampling now and is priced at $1495 in small production quantities. Pricing on the video processor base board varies by the size of the FPGA it comes with, but cost is roughly $7000 when equipped with a mid-level device.